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Project # 134
Pulse Forming Network (PFN)
| Team Lead: | Hamza Alqawasmi |
| Other Team Members: | Ahmed Mohamed | David Ahn | Leo Gamboa | Andrew Vu |
| Faculty Advisor(s): | David A.Wetz |
| Department: | EE |
| Project Type: | Senior Design |
| Title: | Pulse Forming Network (PFN) |
| Abstract: | This project presents the design and implementation of a Pulse Forming Network (PFN) capable of generating controlled high-voltage, microsecond-scale pulses into a matched load. The PFN is designed to produce a ~1 us flat-top pulse with an output impedance of approximately 100 Ω. A MATLAB-based sizing tool was developed to determine optimal stage inductance and capacitance values based on desired pulse width, load impedance, and output voltage. The tool integrates real component data from manufacturer datasheets, including capacitor ESR/ESL and inductor DCR, enabling accurate hardware-matched simulation. LTspice simulations incorporating parasitic effects were performed to evaluate waveform fidelity, ringing, and impedance preservation. The design emphasizes practical implementation considerations, including component selection, high-voltage safety, creepage and clearance requirements, and PCB layout sensitivity to parasitic inductance. Two PCB strategies are explored: a conventional lumped LC design and an alternative trace-based approach for comparative analysis. This work demonstrates the transition from theoretical transmission-line pulse design to a physically realizable high-voltage hardware system. |
| Poster: | View Poster #134 (PDF) |
| Judges Scoring: | Submit Evaluation (judges only) |